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Browsing by Subject "Electrical Engineering"

Now showing 1 - 20 of 113
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    Active sensing with applications to mobile robotics.
    (2012-06) Zhou, Ke
    Compared to static sensors, mobile robots offer significant advantages primarily due to their ability to move and sense the world from multiple vantage points. However, they also pose significant challenges due to limitations on their resources. Specifically, moving a robot to a new location consumes energy, and thus, it is of paramount importance to design optimal motion strategies for mobile robots that maximize task performance while minimizing energy usage. Active sensing seeks to maximize the efficiency of an estimation task by actively controlling the sensing parameters. Of particular interest for mobile robot teams is the case where active sensing is used for determining the locations at which the robots should move to in order to acquire the most informative measurements. By determining the optimal sensing locations that minimize the estimation uncertainty, active sensing enables a robot team to achieve the desired level of accuracy faster and more efficiently as compared to a random sensing strategy. In this dissertation, we investigate active sensing algorithms for the problems of (i) leader-follower formation control, which is referred to as “active formation control”; and (ii) target tracking, which is termed as “active target tracking”. Furthermore, since precise robot localization is a prerequisite for optimal active sensing, we next focus on reducing the complexity of cooperative localization. The first part of this thesis investigates the problem of active formation control, where our objective is to determine the optimal trajectory for a robot in a leader-follower formation that minimizes its localization uncertainty. In particular, maintaining a perfect formation has been shown to increase the localization uncertainty (as compared to moving randomly), or even to lead to loss of observability when only bearing measurements are available and the robots move on parallel straight lines. To address this issue, we allow the follower to slightly deviate from its desired formation-imposed position and seek to find the next best location where it should move to in order to minimize the uncertainty about its relative pose (position and orientation) estimate, with respect to the leader. Our main contribution is that we formulate and analytically compute the global optimum for this constrained non-convex optimization problem. The second part of this thesis focuses on active target tracking, where our objective is to select the best sensing locations of tracking robots so as to maximize the target-position-estimates’ accuracy. More specifically, we introduce an algorithm that analytically computes the global optimal solution of the one-step-ahead (that is, determining the sensing location at the next time step) single-robot active target tracking problem. Furthermore, we show that the problem of one-step-ahead multi-robot active target tracking is NP-Hard. We then relax the original NP-Hard problem and propose a cyclic coordinate descent algorithm (also called nonlinear Gauss-Seidel relaxation), for determining the next sensing location for each robot, whose computational requirements scale only linearly in the number of robots. Finally, we investigate the problem of multi-step-ahead (that is, generating a sequence of optimal sensing locations over a finite time horizon) single-robot active target tracking, and introduce an efficient algorithm based on the nonlinear Gauss-Seidel relaxation, whose computational complexity is quadratic in the number of time steps considered. The final part of this thesis focuses on reducing the computational complexity of multi-robot cooperative localization. In particular, we aim at reducing the processing requirements of the covariance update step when employing the extended Kalman filter (EKF). In contrast to the standard EKF, whose time complexity is quartic in the number of robots, we introduce an efficient algorithm, named the Modified Householder QR, which exploits the special sparse structure of the measurement (Jacobian) matrix, to reduce the processing cost to cubic. In summary, by introducing active sensing algorithms for efficiently solving important problems that arise in robotics (leader-follower formation control, target tracking), and by reducing the computational complexity of cooperative localization, the research presented in this dissertation aims at optimizing resource utilization while minimizing the operational cost of mobile robots deployed in challenging real-world applications.
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    Adaptive filter design for sparse signal estimation.
    (2011-12) Yang, Jie
    Recently, sparse signal estimation has become an increasingly important research area in signal processing due to its wide range of applications. Efficient adaptive algorithms have been developed for estimation of various sparse signals, and the approaches developed are usually application-specific. In this dissertation, we investigate the algorithm and system design for sparse signal estimation of several applications of practical interest, specifically echo cancellation, compressive sensing, and power amplifier pre-distortion. For echo cancellation, different approaches are considered to find the optimal solution. A series of algorithms are proposed to improve the performance and reduce the cost. Specifically, we describe novel adaptive tap algorithms with selective update criteria, a μ-law proportionate technique incorporated with efficient memorized proportionate Affine Projection Algorithms, and a new class of proportionate algorithms with gradient-controlled individual step sizes which can be implemented either in the time domain or the frequency domain. For compressive sensing algorithms with the l0 norm constraint, a sparse LMS algorithm with segment zero attractors is introduced. It can achieve significant convergence and error performance improvements while providing reduced computational cost, especially for large sparse systems with colored inputs. Such filters can also be combined with cascade or multistage realizations, thereby yielding even more efficient implementations. We also describe new results for the non-linear signal estimation problem in power amplifier (PA) pre-distortion with dynamic nonlinearities, where the signal can be represented using a Volterra series with sparse coefficients. An efficient solution using a power-indexed look-up table (LUT) based digital pre-distortion (DPD) is proposed to address the current challenge of poor dynamic performance of a PA operating with wideband signals. Experimental results obtained using a 2 GHz power amplifier driven by a 2-carrier WCDMA signal demonstrate very robust and stable performance for the PA in dynamic environments.
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    Advanced architectures for next generation wireless integrated circuits.
    (2009-06) Cai, Liuchun
    In this thesis, we present and discuss two advanced architectures of wireless integrated circuits. In the first part of this thesis we will focus on the design of an inductorless receiver, which include a LNA, mixer and frequency synthesizer. Inductors are used in RF design to extend the bandwidth by resonating out the load and/or parasitic capacitance. However, on-chip inductors are large and cannot be ported easily from one process to the next. Due to modern CMOS scaling, inductorless RF design is rapidly becoming possible. In this thesis we describe a new methodology for designing the RF frontends necessary for the wideband 1GHz-10GHz bandwidth in a 0.13um CMOS technology. To validate our design methodology two receiver RF frontends were designed; a traditional inductor based design and an inductorless design. A common-gate LNA transconductor is followed by a capacitive peaking LNA-mixer pair (CPLM). Measurement results indicate that CPLM with the same bandwidth has better linearity, comparable noise figure and uses only 17% more power. The silicon area for the CPLM is only 22% of the IPLM. Both designs can be mated with an inductorless, ring-oscillator based, wide lock range and low power PLL also shown in this thesis. We present theory and prototype results for injection-locked frequency dividers based on differential ring oscillators (D-ILFD) and single-ended ring oscillators (S-ILFD), which can be locked to all harmonics (i.e., even and odd). We have developed a general theory for lock range and phase noise for all harmonics for both topologies. Measurement results for the D-ILFD and the S-ILFD show that the lock range decreases with increasing harmonics at the low harmonics while leveling off for larger division ratios. Measured integrated phase noise for D-ILFD and S-ILFD also show that the integrated phase noise decreases with increasing harmonics. The measurement results corroborate our theory. Ring oscillator based D-ILFDs and S-ILFDs are compact and consume low power making them well suited for wideband low power PLLs. We exploit the ring VCO based on an updated Maneatis delay cell with self- boosted biased techniques, which has a ultra wide tuning range of 1 GHz to 10.3GHz. The injection-locked frequency divider (ILFD), which can lock to all harmonics, has been used. A wide lock range, low power PLL based ring VCO and ILFD has been designed for UWB radio. Experimental results indicate that integrated phase noise is below a 30 and power consumption is only 8.6 mA to 22.35 mA for the entire frequency bands. In the second part of this thesis, we focus on noise isolation for mixed-signal (RF/analog/digital) design in CMOS 3D ICs. Faraday cages have traditionally been used to provide isolation from electromagnetic fields. In this thesis, we describe the use of Faraday cages for reducing crosstalk in 3D ICs. We validate our methodology with a combination of simulation and measurements from fabricated prototype designs. Measurement and simulation results show that the crosstalk between the transmitter and receiver reduces by about 75dB up to 10GHz by using a Faraday cage in combination with tier-to-tier isolation, which is one of best performance reported so far. Measurement results indicate that the Faraday cages have no effect on the S-parameters and linearity of inductorless RF circuits. We further develop a lumped equivalent model for crosstalk with and without a Faraday cage. There is good agreement between measurement, 3D electromagnetic simulation and lumped circuit simulation.
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    Advanced learning approaches based on SVM+ methodology.
    (2011-07) Cai, Feng
    Exploiting additional information to improve traditional inductive learning is an active research area in machine learning. In many supervised learning applications, training data contains additional information not reflected in training pairs . Examples include: (1) time series prediction where future samples can be observed in the training data, (2) handwritten digit recognition where training examples are provided by several persons, and this group information is not utilized during training, (3) medical diagnosis where predictive (diagnostic) model, say for lung cancer, is estimated using a training set of male and female patients. The gender can be considered as additional group information. Incorporating this additional information into learning may improve generalization. Recently, Vapnik proposed a general approach for incorporating additional information into learning, known as Learning Using Privileged Information (LUPI) and learning with structured data (LWSD) which utilizes group information (Vapnik, 2006). A SVM based methodology SVM+ was proposed under LUPI and LWSD setting (Vapnik, 2006). In this thesis, we will first introduce a SVM+ based feature selection system. Then we extend SVM+ to multi-task learning (MTL) setting, where both training and test data can be naturally partitioned into several groups. SVM+ based MTL (SVM+MTL) method for both classification and regression are proposed and analyzed. SVM+MTL estimates multiple models simultaneously, i.e. one model for each group/task. Task inter-dependency is modeled by sharing a common part of the decision function among different groups. Connections and differences between SVM+ and SVM+MTL are discussed. Practical parameter tuning strategies are proposed for SVM+MTL. Empirical comparisons show that SVM+MTL works very well on data sets with group information. Finally, generalized sequential minimal optimization (GSMO) methods are proposed for SVM+MTL training, for both classification and regression settings.
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    Architecture and CAD techniques for optimizing FPGAs and reliability of integrated circuits.
    (2009-09) Sivaswamy, Satish Barghav S
    Prohibitive ASIC mask costs and stringent time-to-market windows have made FPGAs attractive implementation platforms in recent years. Modern FPGA architectures provide ample routing resources so that designs can be routed successfully. However, providing such great flexibility comes at a high cost in terms of area, delay and power. In the first part of this thesis, we propose a new FPGA routing architecture that utilizes a mixture of hardwired and traditional flexible switches. This mixture is obtained from careful profiling of benchmark circuits. The result is about 30% reduction in leakage power consumption, 5% smaller area and 20% shorter delays, which translates to 25% increase in clock frequency. Despite the increase in clock speeds, the overall power consumption is reduced. With constant scaling of process technologies in the ultra deep sub-micron regime, chip design is becoming increasingly difficult due to process variations. The FPGA community has only recently started focusing on the effects of process variability. In the second part of this thesis, we propose CAD and architecture techniques to mitigate the impact of process variations in FPGAs. We present a variation-aware router that optimizes statistical timing criticality. We then propose a modification to the clock network to deliver programmable skews to different flip-flops. Finally, we combine the two techniques and show a 9X reduction in yield loss that translates to a 12% improvement in timing yield. When the desired timing yield is set to 99%, our combined statistical routing and skew assignment technique results in a delay improvement of about 10% over a purely deterministic approach. Another challenge with aggressive technology scaling is to ensure the reliability of circuits. Issues with circuit reliability manifest as intermittent failures caused by random particle strikes or permanent failures due to thermal stress. In the third part of this thesis, we develop computationally efficient techniques for analyzing and optimizing reliability of circuits subject to transient particle strikes. We propose a hybrid method that combines exact symbolic analysis with probabilistic measures to estimate reliability. We use such measures in rewiring and gate-sizing based methods to optimize reliability. We study trade-offs involved in terms of area, power and delay when optimizing reliability. Our proposed approach offers a speedup of 56X compared to a Monte Carlo simulation based approach with only a 3.5% loss in accuracy. Our rewiring-based optimization framework improves reliability by 10% along with area and power improvements of 14% and 18% respectively. When we combine the rewiring and gate sizing based optimization techniques, reliability is improved by 17% with modest area and power overheads. In the final part of this thesis, we propose a fast thermal simulation technique for single-processor and chip multi-processor systems. Our technique can be used to estimate thermal stress in modern processors efficiently. A fast and accurate estimation of thermal stress in a system is critical to improving its reliability by preventing catastrophic permanent failures. Our proposed technique of evaluating temperatures across the chip is based on moment matching and moves most of the computation offline. Our temperature computation technique offers a speedup of 441X when compared to a conventional technique based on a Backward-Euler approach with average and maximum errors of 0.89 C and 2.7 C respectively. We observe that lateral heat conduction in the active and substrate layers are significant only for a short distance. We leverage this information to further improve the efficiency of thermal estimation and achieve a speedup of 1900X.
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    Band-Gap tuning through mechanical semiconductor heterostructures
    (2008-12) Makowski, Jan Dominique
    Band-gap engineering of semiconductor heterostructures has become commonplace for laser diodes and photodetectors. However, the quantum states of these devices are largely fixed during crystal growth. This thesis presents a novel method to control the energy of electron states of surface wells. In essence the method adjusts the thickness of a surface quantum well through controlled interaction with a second well. A cantilever with a quantum heterostructure on its underside collapses on top of an identical heterostructure. The air gap between the well serves as a potential barrier and its width determines the interaction between the wells. At the tip the electron gases of both wells overlap to form a well of their combined width. Along the cantilever, the varying air gap dictates the interaction between the wells. A transition zone forms where the electronic configuration changes from the fully coupled case to the case of two individual wells. After successfully releasing cantilevers, interferometric measurements showed that the shape of the collapsed cantilevers matches with theoretical calculations. Van-der-Waals forces across the 125 nm wide air gap do not affect its shape. An actuator to adjust the well separation is demonstrated. It provides vertical deflections from 17 nm towards to 5 nm away from the surface with atomic resolution. Photoluminescence experiments at 4.2 K investigate the energy of electron states. Quantum coupling is demonstrated in 200 Å wide surface quantum wells. The energy shift of up to 12 meV matches well with theoretical calculations.
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    CAD algorithms dealing with process and temperature effects in digital integrated circuits.
    (2010-01) Mogal, Hushrav
    The aggressive scaling trend of the semiconductor industry to improve integrated circuit performance manifests itself as process, voltage and temperature (PVT) variations which can negatively impact design yield. The aim of this work is to deal with process (P) and temperature (T) effects and to develop software CAD analysis and optimization tools to mitigate their effects on digital integrated circuit performance. In the first part of this thesis, we aim to develop an algorithm to compute the criticality of gates in a circuit with underlying process variations. The timing criticality of a gate indicates its impact on the overall timing performance of a circuit. We propose to use graph-based techniques to linearly traverse the timing graph of a digital circuit to obtain its criticality information. Such information can be useful to a designer or optimization tool in making decisions regarding gate sizing to improve the circuit performance. Our methodology must not only improve the speed of computation but also the accuracy with which we obtain the criticality values of gates in the circuit. In the second part of this thesis, we propose to deal with temperature effects in the presence of increased scaling of devices. The sub-threshold leakage power of a digital chip, which is the wasted power in a digital circuit without doing any useful work, is exponentially dependent on the operating temperature of the chip. We propose to use techniques to exploit this dependence to reduce the sub-threshold leakage power. By rearranging the physical placement we can affect the temperature distribution of various blocks on a digital chip, thereby also affecting the total sub-threshold leakage power. We aim to develop a physical floorplanning tool to alleviate the temperature and sub-threshold leakage power by taking into account their interdependence. This work proposes to use task migration (TM) as a methodology to deal with increasing sub-threshold leakage power in future technology nodes. The main idea is to replicate certain high-power blocks in the design, and migrate tasks at regular intervals from one part of the chip to another, thereby reducing the power density and temperature of the design. We aim to develop a CAD optimization framework using floorplanning to read in a circuit description and produce a physical floorplan layout of the TM-aware design. This involves the selection of the design blocks to replicate, followed by the judicious placement of the blocks and finally the selection of an appropriate migration interval taking into account its negative impact on circuit performance. The traditional semiconductor process technology consists of a single layer of silicon on which various devices like transistors and diodes are fabricated along with several layers of metal. Besides the problems outlined above, increasing device density is forcing larger die footprints. As a result, designers are facing increased congestion of routing wires, limiting the amount of performance benefit with scaling. Three-dimensional or vertical integration technology offers a promising alternative, in which multiple layers of silicon with their associated metal layers are stacked on top of each other. Field-programmable devices are particularly suited to such a technology due to the regular layout of logic and routing elements on the die. As the final part of this thesis, we examine the benefits of vertical integration applied to field programmable logic devices.
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    Can You Hear Me Now? Solving the Headphone Problem
    (2009-04-08) Hornung, Stephanie; Evenson, Maureen; Pope, Zach; Olson, Kyle; Cook, David
    This project will develop a product that will be embedded into headphones to prevent the wearer from missing essential communication, either from conversation or emergency sirens (fire alarms, tornado sirens, emergency vehicle sounds, etc.). It will monitor ambient sound and determine whether or not music should be interrupted. A microphone will pick up sound from the environment, then analysis software will process it to determine the next step. If the sound is determined to be either close range human speech or an emergency siren, the code will signal the music to cease. If neither of these is recognized, the music will continue. The bulk of the project lies in developing software that can differentiate human speech from other ambient sounds. Thus far, we are writing code and figuring out what distinguishes human speech from other ambient noise. This includes spectrogram analysis of various sound recordings. From our research, we know that we must analyze each sound to approximately 1/100th of a second (this is defined to be a "feature"). Each feature is assigned a probability that it appears as a portion of a spoken word. We cross-reference each probability with 1000's of feature charts of recognizable human speech patterns to determine if the sound is from a human voice. Based on this probability, we decide if the word is human speech. The code we create to do this will be transferred to a pic microcontroller, which interfaces with the microphone and the music player, allowing it to quickly respond to human speech or emergency signals.
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    Carrier transport study for organic semiconductors using hydrostatic pressure.
    (2008-12) Schroepfer, Dominic David
    Organic semiconducting materials show tremendous potential for use in low cost and light weight devices. However, transistors based on these materials are plagued with inconsistencies in their mobility and threshold voltage. To further the understanding of these devices, hydrostatic pressure is used in this research project to modify the transport properties of the free charge carriers within the semiconductor layer. Thin film transistors made with P3HT are found to respond approximately linear with pressure in both the mobility and threshold voltage. A linear mobility increase of 300% over 1GPa is found for one sample and an increase of 130% is found for a second sample. The threshold voltages change by 40V (from 40V at atmospheric pressure to 0V at 1GPa) for the former device and by 15V (15V to 0V) for the latter. The mobility increase is attributed to a decrease in inter-molecular spacing, which is well approximated by a linear relationship due to the small change in inter-molecular spacing. The threshold voltage changes show evidence of a change in trap site energy relative to the zero-bias Fermi level. Preliminary temperature data indicates that the traps are donor like. Pentacene thin film devices are tested and compared to the P3HT results. With large source to drain voltages (Vds = -20V to -40V) the FETs made from pentacene thin films are unstable, but show initial increases in mobility of nearly 100% from atmospheric pressure to 100MPa. Lowering Vds allows the data to appear more like the P3HT results, showing an approximately linear mobility increase of 100% through the entire 1GPa pressure cycle. The dependence of the threshold voltage on pressure for low Vds has some curvature, but is still roughly linear from -25V at atmospheric pressure to iii -15V at 1GPa. The threshold voltage change is positive (as opposed to negative for P3HT), which indicates increasing negative fixed space charge, but both films (P3HT and pentacene) shift closer to thresholds voltages of 0V. An alternative pentacene thin film device, a capacitor made of a pentacene film, SiO2, and doped Si, is used to study the mobility in another manner. This device shows a nearly linear mobility increase of 500% for 1GPa of pressure. The threshold for this device is nearly constant, in contrast to the FET. Carbon nanotubes and single crystals of organic semiconducting material are also made into FETs and tested versus pressure in this project. Carbon nanotubes are able to return a 50% increase in mobility with 1GPa of pressure, with an approximately constant threshold voltage. Data taken for single crystal rubrene devices extrapolates to a 1400% increase in mobility with 1GPa of pressure, based on data taken from atmospheric pressure to 70MPa (an increase of 100%). The single crystal device is unable to withstand any additional pressure, and the damage that occurs with pressure makes the threshold voltage shift difficult to characterize.
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    Challenges and design principles of large scale tactical network architecture.
    (2010-12) Peng, Andy Shih-Che
    Modern tactical communications systems are moving towards Internet-style system architectures to support information sharing for improving overall mission effectiveness. Development of such large scale communications systems presents various system design challenges. Research works discussed in this thesis are motivated by the technical challenges commonly encountered during the development of several large scale communications systems and proposes system-level design principles in overcoming these technical challenges. The first part of this thesis addresses system-level quality of service issues by modeling and simulation of an afloat wide area network system architecture. This simulation study investigates the system performance of real-time applications and provides quality of service design recommendations. The second part of this thesis proposes a consolidated network architecture for designing an afloat local area network system. A simulated prototype system is developed to investigate the system performance trade-off in the proposed consolidated network architecture. The third part of this thesis proposes an automatic dynamic resource management system architecture to efficiently manage shared computing resources in resource-constrained network environments without any human operator intervention. Test results in this experimental study demonstrates improved network performance when a communications system employs the automatic dynamic resource management software. Finally, the last part of this thesis proposes a reliable data aggregation and dissemination framework for tactical communications systems operating in disruptive networking environments with intermittent network connectivity. A prototype system is developed and implemented to demonstrate that the proposed framework can ensure reliable data delivery which is beneficial to the current and future development of tactical communications system architectures. This thesis makes several significant research contributions in designing a large scale communications system. First of all, the thesis suggests a simulation methodology for developing simulation models to study the performance of a large scale communications system and makes recommendations on system-level quality of service design. Secondly, the thesis reduces the complexity of future communications system design by proposing a consolidated system architecture. Thirdly, an automatic dynamic resource management software prototype is developed to alleviate resource contention issues commonly found in the tactical networking environments. Fourthly, a reliable data aggregation and dissemination framework is proposed and its function is demonstrated. The proposed framework can accurately infer meaningful messages from a large sensor data set and can reliably deliver the messages to the appropriate network destinations. Finally, the thesis organizes all of these relevant system-level design experiences and recommends system design principles for developing future large scale communications systems.
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    Channel matched iterative decoding for magnetic recording systems.
    (2009-04) Alhussien, AbdelHakim Salem
    The perpendicular magnetic recording channel (PMRC) is corrupted by sever intersymbol interference and data-dependent media noise, in addition to a variety of other bursty impairments. Thus far, the hard decodable symbol correcting Reed-Solomon (RS) code has been the industry standard for outer error control coding (ECC). This thesis proposes two novel ECC schemes in the migration toward next generation high density recording. The first scheme is a two-level concatenation of channel-matched turbo equalization (TE) and outer RS, replacing current inner parity correction codes. Conventional TE is matched to the channel via the incorporation of the error pattern correction code (EPCC), which works iteratively with the other constituent code in TE, whether block or convolutional, to suppress the occurrence of low-Euclidean-distance errors at the output of the channel detector. To understand this mechanism, and with no loss of generality, we derive the error Euclidean distance distribution of TE-EPCC for the Dicode channel, and show that EPCC substantially increases the interleaver gain exponent of low Euclidean weight errors. Furthermore, we derive an upper bound on the BER of TE-EPCC, and employ it to show that TE-EPCC delivers significant gains in the error floor and cliff regions compared to conventional precoded and unprecoded TE for a variety of channel conditions and code rates. The second proposed ECC system is a tensor product concatenation of EPCC and Q-ary LDPC (T-EPCC-QLDPC). This concatenation scheme enables the use of byte-long component EPCC without jeopardizing the overall code rate. Hence, the multiple error correction capability of EPCC is maintained at very low signal-to-noise ratios, while the component non-binary LDPC insures correct syndromes are available for the decoding of tensor symbols (EPCC code-blocks). We introduce a low complexity iterative soft decoder of T-EPCC-QLDPC, in which the component EPCC and QLDPC exchange multi-level loglikelihood ratios (mlLLR) that represent their beliefs on the reliability of error-syndromes. Moreover, we show that the two-level decoder provides a better performance-complexity tradeoff compared to single-level binary and Q-ary LDPC.
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    Characterization of coplanar waveguide circuits with fluidic channels
    (2010-06) Murray, Casey Edward
    This thesis discusses the characterization of a coplanar waveguide circuit with fluidic channels. The use of fluids in radio frequency circuits is highly unexplored. This work aims to provide generalized design guidelines to maximize the impact of fluids introduced into a coplanar waveguide structure. Leveraging the design guidelines presented within, a coplanar waveguide circuit is designed and fabricated. The test circuit is analyzed and the impact of the fluids on characteristic impedance is presented. Directions for future work is also discussed.
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    Coherent beam combining for high power laser applications.
    (2009-09) Khajavikhan, Mercedeh
    This thesis is an effort to address several issues in coherent beam combining. First, a mathematical formalism is developed to study cavity dependent properties, in particular, the modal response of complex laser systems. It is shown that the coherent beam combining in these common cavities is extremely sensitive to random path-length variations of the individual gain elements. Next, a number of methods are explored to reduce this sensitivity to length variations without actively controlling the path-lengths. This thesis introduces several coherent beam combining architectures based on Michelson cavity in which the spatial and longitudinal supermodes of the common cavity are manipulated to decrease the path-length sensitivity. A set of experiments is designed to verify the role of spatial and longitudinal supermodes. The measured dominant eigenmode, eigenvalue and output power are in good agreements with the predictions of the modal analysis. Finally, many applications prefer the output power to be concentrated in a small spot, whereas the supermodes of most complex cavities contain several lobes. This thesis describes a mode shaping technique, capable of converting any supermode to the desired distribution, with theoretically a 100\% efficiency. The technique employs two phase plates modifying the phases in Fourier conjugate planes to create a uniform beam (both in amplitude and phase), which directs all the power to the central lobe of the far-field. An experiment is performed to combine eleven in-phase beams, corresponding to the fundamental mode of the self-Fourier cavity, into a single-lobed far-field.
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    Collaborative data processing in wireless sensor networks.
    (2008-12) Zhang, Qingquan
    Wireless Sensor Networks (WSNs) have been used in many application domains, such as target tracking or environmental monitoring. Due to limitations of power supplies, power management and power efficient target tracking techniques have become more and more critical. In this dissertation, systematic approaches are proposed to address the above problems. In particular, efficient energy-aware architectural design aspects of a sensor network are developed, with the goal to reduce the control scheduling algorithm complexity and the power consumption of various components while maintaining the data quality and performance requirements. Research results on an efficient error-bounded sensing scheduling algorithm, a novel collaborative global error implied assisted scheduling algorithm(CIES) and fast target localization for mobile wireless sensor network are presented. Dynamic scheduling management in wireless sensor networks is one of the most challenging problems in long-lifetime monitoring applications. In this thesis, we propose and evaluate a novel data correlation-based stochastic scheduling algorithm, called Cscan. Our system architecture integrates an empirical data prediction model with a stochastic scheduler to adjust a sensor node’s operational mode. We demonstrate that substantial energy savings can be achieved while assuring that the data quality meets specified system requirements. We have evaluated our model using a light intensity measurement experiment on a Micaz testbed, which indicates that our approach works well in an actual wireless sensor network environment. We have also investigated the system performance using Wisconsin- Minnesota historical soil temperature data. The simulation results demonstrate that the system error meets specified error tolerance limits and up to a 70 percent savings in energy can be achieved in comparison to fixed probability sensing schemes. Building on the results obtained from CScan, we further propose and evaluate a collaborative error implication assisted scheduling algorithm, called CIES. This computationdistributive system integrates an implied-error based prediction model together with a stochastic scheduler to adjust neighboring sensors’ operational modes during the occurrence of rare or unusual sensing events. We demonstrate that substantial energy savings can be achieved while also satisfying a global error constraint. We have conducted extensive simulations to investigate the system performance by using realistic Wisconsin-Minnesota historical soil temperature data. The simulation results demonstrate that the system error meets the specified error tolerance and produces up to a 60 percent energy savings compared several fixed probability sensing references. In order to manage data link quality, a distributed sensor network with mobility provides an ideal system platform for surveillance as well as search and rescue applications. We consider a system design consisting of a set of autonomous robots communicating with each other and with a base station to provide image and other sensor data. A robot-mounted sensor which detects interesting information will coordinate with other mobile robots in its vicinity to stream its data back to the base station in a robust and energy-efficient fashion. The system is partitioned into twin sub-networks in such a way that any transmitting sensor will pair itself with another nearby robot to cooperatively transmit its data in a multiple-input, multiple-output (MIMO) fashion. At the same time, other robots in the system will cooperatively position themselves in such a way that the overall link quality is maximized and the total transmission energy in minimized. We efficiently simulate the system’s behavior using the Transaction Level Modeling (TLM) capability of SystemC. Our results demonstrate the efficiency of our simulation approach and provide insights into operation of the network. Finally, a fast target acquisition algorithm without the assistance of a map, call GraDrive, is introduced for search and rescue applications. We evaluate a novel gradientdriven method, which integrates per-node prediction with global collaborative prediction to estimate the position of a stationary target and to direct mobile nodes towards the target along the shortest path. We demonstrate that a high accuracy in localization can be achieved much faster than with random walk models, without any assistance from stationary sensor networks. We evaluate our model through a light-intensity matching experiment using MicaZ motes, which indicates that our model works well in a wireless sensor network environment. Through simulation, we demonstrate almost a 40% reduction in the target acquisition time, compared to a random walk model, while obtaining a small error in the estimate of the target position.
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    Constricted current perpendicular to plane (CPP) magnetic sensor via electroplating.
    (2011-01) Huang, Xiaobo
    Electrochemically deposited magnetic nanowires have gained increasing attention since current perpendicular to the plane giant magnetoresistance (CPP-GMR) was observed in multilayered nanowires. Magnetic nanowires have potential for fundamental studies, including measuring spin diffusion lengths and understanding the mechanisms of the electron spin transfer. They also have great potential technological applications as CPP-GMR sensors, magnetic random access memory (MRAM), and next generation magnetic recording heads. Small diameter nanowires are desired in order to have large current density per device and a high areal density for device arrays, for example, 2 Tb/in2 media. In this research, E-beam lithography, nano-imprinting, and self-assembled nanoporous alumina templates (AAO) were studied to achieve as small diameter nanopores as possible. AAO templates with 10 nm diameter were fabricated using both Al foils and Al thin films. Very small diameter (10 nm) CPP-GMR Co/Cu nanowires were fabricated into AAO templates using electrochemical deposition. The magnetic transport properties of these multilayered and trilayered Co/Cu nanowires were investigated. It was found that nanowire anisotropies parallel and perpendicular to the nanowires were dependent on the thicknesses of Co and Cu layers. GMR of 19% was achieved with 10 nm diameter nanowires at room temperature. The magnetic free layers were as thin as 4.5 nm with GMR of 18%. Spin transfer torque switching current densities were measured to be 106 - 108A/cm2. The measurement of spin transfer torque was conducted numerous times with high repeatability in the critical switching currents from parallel to antiparallel alignment (JP-AP) and slight variations in back (JAP-P). Small resistance area products (RA) of 0.003 ohmµm2 were achieved with trilayers that had 40ohm total resistance. All of results in this study show that nanowires with 10 nm diameters have potential application as next generation CCP-GMR sensors and spin transfer torque MRAM.
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    Control and optimization with dimensionality constraints
    (2008-10) Takyar, Mir Shahrouz
    The purpose of this thesis is to develop synthesis tools for control design with dimensionality constraints. In particular, given a model for a physical process, the goal is to characterize all possible controllers of a certain dimension which satisfy given performance criteria. In classical feedback design, the complexity of controller adversely affects robustness of the regulatory mechanisms of the feedback and adds to the fragility of the system. The complexity is often due to the difficulty in imposing performance specifications in a natural mathematical context. Typically, this is done using "weight functions" which encapsulate the specifications, and then introducing those in a suitable optimization problem. A contribution of this work is to address a certain type of optimization problem and the choice of weight functions. More precisely, we develop a new design approach which leads to a controller achieving both requirements, the performance specifications and low complexity, at the same time. Further, this thesis generalizes the previous methods for multivariable systems by developing analogous theory and techniques. The main contribution in multivariable analytic interpolation is to characterize a family of minimal McMillan degree solutions by a choice of spectral-zero dynamics. In addition to application of this theory for model-matching in control design, we show how to use the same techniques for maximum power transfer in circuit theory, and for spectral estimation in signal analysis. Also in this thesis we give new results on implementation of controllers with some very specific elements. One such, which is hard to simulate on a digital computer, is what could be described as "half capacitor". It implements a "fractional integration" and can be used to a great advantage in classical feedback design, providing gain but without introducing time-lag.
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    Crosstalk mitigation techniques in high-speed serial links.
    (2009-04) Sham, Kin-Joe
    One of the primary challenges in high-speed chip-to-chip serial link design is maintaining signal integrity in the presence of inter-symbol interference and crosstalk. Far-end crosstalk (FEXT), the interference from an adjacent aggressor line, has become a major noise source as data rates continue to increase. In addition to reducing the effective signal-to-noise and interference ratio (SNIR), FEXT introduces deterministic crosstalk-induced jitter (CIJ) in the received signal, thereby degrading the receiver's bit error rate (BER). By mitigating FEXT, inter-chip I/Os can have higher aggregate data throughput and interconnects can be placed closer together, which reduces the board area needed and the cost associated with it. In this thesis, two different techniques have been proposed to mitigate the effect of FEXT. The first technique employs FIR filters to implement FEXT cancellation (XTC) at the transmit end, which removes FEXT on each channel to further improve the SNIR of the received data and reduce the CIJ. The second technique staggers the multilane I/Os by adding a variable delay to every other channel at the transmit end, thus shifting the coupled FEXT away from the zero-crossing points of the victim channel. Although I/O staggering can lower CIJ and increase timing margin with relatively little added power, it comes at a cost of decreasing the existing voltage margin. The proposed techniques provide the required groundwork for developing MIMO communication methods that will effectively extricate additional information from FEXT to further reduce the BER during data detection. New I/O transceiver designs with the two techniques have been implemented and fabricated in CMOS processes. In addition, an accurate FEXT model has been developed using a two-pole moment matching technique. As data rates approach higher speeds and FEXT becomes a dominant noise source, the research presented has shown that FEXT mitigation is critical to enhance jitter performance and improve eye openings in high-speed serial links.
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    Design of an On-chip Thermal Sensor using Leakage Current of a Transistor
    (2010-01) Khare, Harshada Vinayak
    Our efforts are to design a self-contained, supply-insensitive, completely on-chip thermal sensor based on exponential temperature dependency of leakage current of a PMOS transistor in sub 90-nm technologies. Simulation results show an error of 3.9ºC for a temperature range of 25ºC to 110ºC with +/-10% supply variation. The circuit was fabricated in 65 nm CMOS technology with a nominal supply voltage of 1.2V. Area of the sensor is 0.0026 mm2 and power consumption 351.55 μW at 25ºC. The circuit uses no temperature insensitive on-chip or external references.
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