Development of next generation computing elements fabricated with emerging technologies.

Abstract

Revolutionary developments in the electronics industry have enabled rapid and unprecedented advances in modern systems. This has been achieved in part due to an aggressive push towards technological developments by the semiconductor industry. The electronics technology has sustained this steep trend, however, the International Technology Roadmap for Semiconductors (ITRS) that assesses future technology requirements, has identified several fundamental challenges of scalability, speed, energy and reliability that can severely limit the ability of CMOS devices to continue to maintain the sharp developmental curve. These challenges, and the discovery of new physics effects and materials, have ushered in several efforts dedicated to researching new technologies that can help support the aggressive technological roadmap. The emerging technologies bring novel capabilities for computing, however, there are large gaps in our understanding of these new technologies and how to build circuits with them, that must be filled before they can be integrated into computing systems. This thesis focuses on evaluating the computing potential of two promising, emerging technologies: Nanoelectromechanical systems (NEMS) and Spintronics. Both technologies differ in their device physics and capabilities from electronic MOSFET devices, and pose novel challenges for integration into current computing systems. The devices from the NEMS technology are extremely power-effcient, however they have a high mechanical delay. To allow the NEMS devices to serve as effective digital switches, a novel logic design technique called `weighted area logic' that addresses the fundamental delay challenge of the devices has been proposed. The new design technique also reduces power and area of implementation by reducing the number of devices in a circuit. Devices from the Spintronics technology are based on magnetic effects and do not directly replace the switch-based electronic transistors. Their singular characteristics necessitate novel ideas to enable logic operations. Some of the differences of the devices from CMOS devices affect fundamental abilities that computing circuits are generally founded on. These include input-output signal compatibility, scalability of logic circuits and composability. Circuit designs and techniques that address these three challenges are proposed and studied using the spintronic devices of Magnetic Tunnel Junctions (MTJs). A novel MTJ-based logic circuit that operates completely on spintronic principles and has spintronic input-output compatibility is designed and evaluated. An extension of this circuit into a scalable and programmable logic circuit is also proposed. The idea of combining the unique device capability of processing and storage is also presented through the design of a Spintronic Logic In Cache unit. Further, the design for an 8-function 1-bit spintronic arithmetic and logic unit has been proposed.