Parasitic Component Analysis and Acoustic noise evaluation in Voltage Regulator Modules (VRMs)

Abstract

Stable and regulated supply voltage has been an important topic of discussion in a consumer electronic products. Every chip and device requires specified voltages with small margins. Voltage regulated modulators (VRMs) have always been proven to provide a solution to this problem. Building a power stage using point of load method helps overcome variability issue in the signal but introduces a converter with lot of supporting components. Multiple combination of capacitors and resistors of different material composition are required to obtain an optimal design for the product. PCB parasitic comes into play and due to high current slew rate physical stress builds up in the caps which tend to come out in form of acoustic noise. This thesis deals with such issues which can improve the product quality but keeping the cost low by utilizing and analyzing components the proper way.