Exploration of Carrier Transport and Novel Devices in Emerging Semiconductors

Abstract

With scaling and performance of silicon-based transistors reaching their fundamental limits, a cross-disciplinary effort has gone into identification of novel material systems and device architectures that can outperform conventional solutions. Two systems that have shown good promise are van der Waals (vdW) semiconductors and semiconducting perovskite oxides. vdW semiconductors have already been used to demonstrate conventional MOSFETs and TFETs because of their atomically smooth surfaces and extremely thin body thicknesses which result in enhanced electrostatic gate control and improved scalability. On the other hand, semiconducting perovskite oxides have a large bandgap, low carrier effective masses and ability to form unique heterostructures making them interesting candidates for high-power high-frequency applications. The purpose of this thesis is to explore the electrical and material characterization results of electronic devices fabricated from Black Arsenic (vdW semiconductor) and SrSnO3 (perovskite oxide), by diving into their fundamental carrier transport studies. Exfoliated flakes of black arsenic (BAs) were used to fabricate MOSFETs which demonstrated ambipolar transport. The fabricated devices showed layer-dependent transport with high on/off ratios, high mobility and low off-current. Low temperature characterization revealed presence of low Schottky barrier height at the Ni/BAs interface while electron (hole) mobility vs temperature plot showed mobility was phonon limited. To show practical applications, ambipolarity of the devices was used to demonstrate an inverter and a frequency doubler as well. Ni/BAs interface was further explored, which revealed formation of an in-plane metallic contact to the semiconducting channel. Based upon this observation a self-aligned FET with lowered contact resistance is also proposed. Doped SrSnO3 had already been used to demonstrate MESFETs and RF FETs. However, SrSnO3 has low thermal conductivity which can result in degraded performance due to self-heating. An all-electrical method based on pulsed I-V characterization was performed to determine the thermal resistance and quantify the rise in channel temperature of two-terminal devices under electrical bias. TCAD simulations were performed to show that the rise in channel temperature was in close agreement with the experimental values. To further explore the carrier transport, electrical breakdown in undoped films was studied and contact optimization to doped SrSnO3 was also performed.