From Stochastic to Unary Computation -- Filter Applications

Abstract

Improving computation efficiency is a perennial problem in digital and analog systems, where we always want to perform complex functions with less power and faster operating speeds, especially with recent advances in artificial intelligence, machine learning and 5G systems. These emerging applications require implementation of unprecedented complex functions and workloads on our existing computation scheme, which is dominated by binary computations. stochastic computing is an alternative method of computation that can perform complex functions with much smaller hardware footprint compared to the binary scheme, but it suffers from long delays and unreliable accuracy. In this thesis we propose an approach to eliminate the randomness needed for stochastic computing and resort to deterministic representations and computations, yet maintain the smaller area and much shorter delay benefits that stochastic computing provides compared to binary computing. We propose a novel method to perform computations that optimizes chip routing resources and using a small logic footprint. Additionally, as a practical example we illustrate our methodologies using an FIR filter application based on our routing network. Furthermore, we demonstrate a digital oscillator based system that is able to change frequencies within nanoseconds. In addition to the digital oscillator the system uses a memory-less digital-to-analog converter and an analog injection locked oscillator to filter out potential harmonics. The application has potential uses in 5G and 6G systems as it avoids the impact of multipath.