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Browsing by Subject "Quadrature"

Now showing 1 - 2 of 2
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    Fast hopping frequency synthesis techniques using injection locking.
    (2010-03) Lanka, Narasimha
    The use of fast-hopping frequency synthesis is a critical component of frequency-hopped spread spectrum (FHSS) systems. FHSS offers many advantages including high resistance to narrow-band interference, low probability of intercept and capability to share spectrum with other narrow-band systems. Such qualities make FHSS a particularly attractive scheme for military applications. In commercial applications, the WiMedia specification for ultra-wideband (UWB)/Wireless-USB presents another standard that uses fast frequency-hopping. The most stringent constraint on the frequency synthesizer in these systems is the band-switching time. This thesis presents novel techniques for fast-hopping frequency synthesis based on injection locking. First, extensive study of the transient behavior of oscillators under injection is presented. Analystical expressions are used as the basis for the study and interesting aspects of the locking process of an injection-locked oscillator (ILO) are identified. Two techniques, lock-range dependent fast-locking and predictive fast-locking, are then presented. In the first technique, fast locking times are achieved by using large lock-ranges for the ILO. Phase dependence of lock-time is exploited in the second technique and extremely fast settling is achieved. These theoretical findings are verified through simulation and measurements from a multiple of oscillator prototypes. Measurements from a low-speed Colpitts oscillator running at 57 MHz are used to verify tracking, out-of-lock behavior and frequency settling of ILOs. Measurements from an LC-oscillator implemented in 0.13-um CMOS technology operating at a free-running frequency of 3.4 GHz are used to verify the dependence of locking time on the lock range and the initial phase of injection. Novel architectures for fast frequency-hopping synthesizers and high frequency direct-digital synthesizer are then presented. Finally, a complete prototype for WiMedia-UWB/Wireless-USB-compliant fast-hopping frequency synthesizer architecture with quadrature outputs, based on sub-harmonic injection-locking, is presented. The synthesizer features a cross-coupled quadrature digitally-controlled oscillator, that is injection-locked to a sub-harmonic frequency. An intuitive closed-form expression for the dynamics of the quadrature injection-locked oscillator is derived. The overall design is a CMOS-only implementation and has been fabricated in 0.13-um SiGe BiCMOS process. Measurement results indicate lock-times of less than 2.5 ns, a locked phase noise of -114 dBc/Hz at 1 MHz offset and a quadrature accuracy of better than 0.5 deg. The frequency synthesizer (excluding output buffers) occupies an area of 0.27 mm2 and consumes 14.5 mW of power. The best and worst-case spur suppression achieved are 47 and 31 dB, respectively. This is the lowest power fast-hopping quadrature frequency synthesizer reported to-date.
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    Quadrature Frequency Synthesis for Wideband Wireless Transceivers
    (2014-05) Elbadry, Mohammad
    In this thesis, three different techniques pertinent to quadrature LO generation in high data rate and wideband RF transceivers are presented. Prototype designs are made to verify the performance of the proposed techniques, in three different technologies: IBM 130nm CMOS process, TSMC 65nm CMOS process and IBM 32nm SOI process. The three prototype designs also cover three different frequency bands, ranging from 5GHz to 74GHz. First, an LO generation scheme for a 21 GHz center-frequency, 4-GHz instantaneous bandwidth channelized receiver is presented. A single 1.33 GHz reference source is used to simultaneously generate 20 GHz and 22 GHz LOs with quadrature outputs. Injection locking is used instead of conventional PLL techniques allowing low-power quadrature generation. A harmonic-rich signal, containing both even and odd harmonics of the input reference signal, is generated using a digital pulse slimmer. Two ILO chains are used to lock on to the 10th and 11th harmonics of the reference signal generating the 20 GHz and the 22 GHz quadrature LOs respectively. The prototype design is implemented in IBM's 130 nm CMOS process, draws 110 mA from a 1.2 V supply and occupies an active area of 1.8 square-mm. Next, a wide-tuning range QVCO with a novel complimentary-coupling technique is presented. By using PMOS transistors for coupling two VCOs with NMOS gm-cells, it is shown that significant phase-noise improvement (7-9 dB) can be achieved over the traditional NMOS coupling. This breaks the trade-off between quadrature accuracy and phase-noise, allowing reasonable accuracy without a significant phase-noise hit. The proposed technique is frequency-insensitive, allowing robust coupling over a wide tuning range. A prototype design is done in TSMC 65nm process, with 4-bits of discrete tuning spanning the frequency range 4.6-7.8 GHz (52% FTR) while achieving a minimum FOM of 181.4dBc/Hz and a minimum FOMT of 196dBc/Hz. Finally, a wide tuning-range millimeter wave QVCO is presented that employs a modified transformer-based super-harmonic coupling technique. Using the proposed technique, together with custom-designed inductors and metal capacitors, a prototype is designed in IBM 32nm SOI technology with 6-bits of discrete tuning using switched capacitors. Full EM-extracted simulations show a tuning range of 53.84GHz to 73.59GHz, with an FOM of 173 dBc/Hz and an FOMT of 183 dBc/Hz. With 19.75GHz of tuning range around a 63.7GHz center frequency, the simulated FTR is 31%, surpassing all similar designs in the same band. A slight modification in the tank inductors would enable the QVCO to be employed in multiple mm-Wave bands (57-66 GHz communication band, 71-76 GHz E-band, and 76-77 GHz radar band).