Browsing by Subject "DC-DC conversion"

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    Circuit Techniques For Efficient Integrated Power Management In Standard CMOS
    (2018-08) Chaubey, Saurabh
    DC-DC voltage conversion is the heart of integrated power management. It involves conversion of a voltage level from a source (usually higher) to a different voltage level required by a load (usually lower than the source). During this process, we desire that the output power should be as close as possible to the input power for higher power efficiency and lower losses. In hand held battery operated systems, the need for higher efficiency becomes even more critical due to limited energy source - the battery. This research focuses on the integrated power management of such battery operated systems. The techniques developed here, in general, are very much applicable to the integrated power management of any other type of applications as well. This work provides an end-to end integrated DC-DC conversion solution. This involves developing a switching regulator to convert the source voltage (usually a battery voltage) into a usable intermediate voltage. This intermediate voltage would have small voltage ripple and noise. If this intermediate voltage is substantially different from the target load voltage, a second switching regulator can be applied to minimize the difference between the two. After one or more switching regulator stage(s), when the voltage level reaches very close to the target voltage of the integrated load circuit, a final linear voltage regulator may be applied to convert the intermediate voltage exactly equal to the target load voltage. The linear regulator also removes the ripple and noise from the voltage, as the ripple and noise will not be suitable for most of the integrated circuits. Both in switching regulators and linear regulators, integrated passives are required. Switching regulators are of mainly two types, inductive and capacitive. While capacitive converters require high quality integrated capacitors, the inductive converters require both integrated inductors and capacitors. Linear regulators require integrated resistors or capacitors or both depending on the circuit and architectural details. In this research, all three facets of integrated DC-DC conversion (switching regulators, linear regulators and integrated passives) have been investigated in order to develop efficient and compatible end-to-end solution. The research starts with formulating a unied design framework for capacitive DC-DC converters. The framework provides a theoretical analysis which proves extremely useful in choosing the most optimum DC-DC converter circuit (for specific input/output characteristic) and also provides an accurate estimate of the output parameters for a given specification. Next, the research moved to design the low cost, high quality integrated capacitors in standard CMOS process. Using the framework and knowledge of integrated composite capacitor, a programmable capacitive DC-DC switching converter was designed. Next the research focused on design of linear regulators and direct battery to silicon power transfer circuits. Following are the brief descriptions of all these works. This research started with the development of a design framework to select the best topology and conversion ratio for series-parallel capacitive buck/boost DC-DC converters. The framework models all converter families providing design insights and tradeoffs among the various topologies. We select the 10 optimal topologies that always perform better than any of the 96 permutations that are possible for series-parallel converters. A logical extension of the framework includes the impact of parasitics and other second order effects including partial charging and finite tank capacitor size. The work includes a step by step design methodology for capacitive converters. Second part of the research introduced an accumulation floating junction (AFJ) MOS capacitor that achieves the capacitance density of 18.3 fF/um2 with less than 2uA/mm2 leakage. This leakage is 40X lower than standard MOS capacitors. The capacitor was fabricated in TSMC 65nm CMOS. Next, the research focused on a fully integrated, software defined capacitive DC-DC converter. The converter implements K-F-C tuning (K = conversion ratio, F = frequency and C = capacitance) in real time so as to accommodate any output load. It has a 4X tunable output voltage, supports a 3269X output load current range while achieving a peak efficiency of 82.1%. The converter transforms a 1.0V input to a 0.25-0.95V output for a 0.13mA-425mA load range while maintaining better than 70% efficiency (state of art average load efficiency is around 65%). The power density for better than at 70% efficiency is 1.05W/mm2 (@ Vout=430mV) while peak value is 2.15/mm2. Next, this research focused on the first fully integrated low-voltage analog LDO (low dropout regulator) for sub-0.5V supply voltages. The LDO can operate from 0.3V-to-1.0V input voltage, and can sustain a load variation of 10mA-to-100mA at 1.0V input and 5mA-to-25mA at 0.3V input. It achieves a peak 99.1% current efficiency for a 100mA load at 0.9V output voltage. In order to realize the gate drive at sub-0.5V supply voltages, we introduce a negative charge pump based adaptive oset before the pass FET which provides gate-source headroom at input operation voltages normally reserved for digital LDOs. The smart-adaptive negative oset voltage follows a 0:5-0.5VDD scheme to accommodate a wide range of input voltages while providing the necessary extra gate drive at low inputs. The 32 phase charge pump runs at a frequency of 3GHz with a ripple of ~ 3mV. Fifth phase of the research focused on the circuit techniques for direct battery to silicon (DBS) power transfer. Both capacitive and inductive converters are evaluated to suit for DBS. Also, a new multi-mode DC-DC converter has been investigated to achieve a single stage direct battery to silicon power transfer. Lastly, the sixth phase of this work presents a first ever digital LDO (Low Drop Out regulator) with zero steady state output voltage ripple.