Truttmann, Tristan K2021-04-012021-04-01https://hdl.handle.net/11299/219230A schematic of the transistor structure.Device structure of (a) gate-recessed SSO MESFET on a bi-layer epitaxial film, and (b) a non-recessed control device on a single-layer film. A heavily doped n+-SSO cap layer on top of a n:SSO channel is used in order to lower the contact resistance as well as the access resistance.CC0 1.0 Universalhttp://creativecommons.org/publicdomain/zero/1.0/Dataset