Kong, JinseokYew, Pen-ChungLee, Gyungho2020-09-022020-09-021999-01-09https://hdl.handle.net/11299/215370Directory-based cache coherence schemes are commonly used in large-scale distributed shared-memory (DSM) multiprocessors, but most of them rely on heuristics to avoid large hardware requirements. We proposed to use physical address mapping on the memory modules to significantly reduce the directory size needed. This approach allows the size of directory to grow as O (cn log2n) as in optimal pointer-based directory schemes [10], where n is the number of nodes in the system and c is the number of cache lines in each cache memory. Our simulations show that the proposed scheme can achieve a performance equivalent to the heuristic pointer-based directory schemes, but with a smaller directory size and a simpler pointer management scheme.en-USReport