Design and analysis of a four-quadrant, high linearity, time-domain, analog multiplier
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AI and communications circuits require correlation circuits that use a MAC (multiply accumulate) operation as their core. In the MAC, the multiplication circuit tends to be the most power hungry and most critical component compared to addition. Currently, digital implementations of the circuits are very power hungry. Analog circuits offer opportunities to save power, particularly for lower SNR use cases. However, in modern processes, lowering supply voltages and second-order effects have degraded the linearity and dynamic range of analog circuits. This work presents an analog multiplier capable of high linearity and range, with a maximum input magnitude of 400 mV and THD% of 0.014 %. This design achieves this by using a novel time-domain approach, where the input voltages are multiplied by integrating a current over a length of time. This concept offers great promise for future development and adds to the capabilities of time-domain circuits.
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University of Minnesota M.S.E.C.E. thesis. May 2025. Major: Electrical/Computer Engineering. Advisor: Ramesh Harjani. 1 computer file (PDF); xv, 89 pages.
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Hill, Ethan. (2025). Design and analysis of a four-quadrant, high linearity, time-domain, analog multiplier. Retrieved from the University Digital Conservancy, https://hdl.handle.net/11299/275820.
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