Spintronics, as a beyond-CMOS technology, provides many possibilities for the next-generation information storage and processing. This thesis focuses on the development of novel spintronics devices towards low-energy, high-performance memory and computing applications. In this thesis, we present the manipulation of a magnetic storage unit either with a current-induced spin-orbit torque (SOT) or using a voltage via piezoelectric strain. We also propose a novel in-memory computing architecture based on the SOT storage cell. For the first part, the SOT induced switching is explored for both ferromagnets (FM) and antiferromagnets (AFM) systems. For the study of FM, two fundamental limitations related to the switching of a perpendicular magnetized system are solved. First, this thesis expands the scope of spin torque switchable materials, from interfacial PMA magnets only, to bulk PMA magnets, which have a better thermal stability when scaled down and are regarded as potential candidates in future MRAM. Second, the difficulty of field-free SOT switching is addressed by developing a dipole-coupled composite device. Compared with competitive strategies, the composite device is the most compatible one with existing MRAM technologies and readily applicable for SOT-based memory and logic devices. Beyond the exploration of SOT in FM, this thesis also attempts to tackle the spin torque induced switching in an AFM system, by characterizing the devices with a widely adopted 8-terminal geometry. It is discovered the “saw-tooth” signal, which was previously regarded as the evidence of AFM switching, actually originates from thermal artifacts. Then, the voltage-controlled device is studied utilizing a piezoelectric / magnetic tunnel junction (MTJ) coupled structure for ultra-low power writing of data. Voltage-controlled toggling of MTJ is achieved via the piezoelectric strain generated from a pair of local gates. The local gating design allows efficient manipulation of individual cells and opens the door towards realistic strain-based MRAM. Finally, a new architecture for computational random-access memory (CRAM) is invented based on the 3-terminal SOT-MTJ. Similar to the STT-MTJ based counterpart, the SOT-CRAM allows true in-memory computing and thereby meets the energy and throughput requirements of modern data-intensive processing tasks. Moreover, the excellent features of SOT unit cells would provide a large improvement in speed and energy compared with other in-memory computing paradigms.