Browsing by Subject "thin film transistor"
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Item Understanding the Effects of Quantum Confinement and High-K Gate Dielectrics in Solution-processed Metal Oxide Nanocrystal Transistors(2020-12) Sun, YuhangTransparent metal oxide semiconductors have various attractive features like high mobility and excellent transparency, which makes them a promising class of materials in display applications. Their ease of fabrication using solution processing greatly expands their benefits for large-area electronics. Though much of the current solution-processed electronics research focuses on ink formulations based on inorganic sol-gels, colloidal nanocrystals are an attractive alternative that may provide more stable inks owing to their tunable size and surface properties. Compared with chalcogenides, colloidal nanocrystals of metal oxide semiconductors (especially ZnO and In2O3, etc.) offers significant advantages including excellent air-stability and non-toxicity, which makes them the best candidates for next-generation/printable electronics. In this work, zinc oxide and indium oxide nanocrystal inks are demonstrated as high-performance and air-stable transistors. For ZnO nanocrystal inks, pronounced quantum confinement effect was exhibited in the liquid phase due to their ultra-small size and good encapsulation, and this effect was preserved when deposited into thin films. The impact of low to medium temperature annealing on residual ligand content inside the film, crystallinity of the film, and the extent of quantum confinement were examined by a combination of characterization methods. These results provide insights about leveraging the benefits of colloidal nanocrystal inks for printed electronics. The enhancement of field-effect mobility in metal oxide thin-film transistors (TFTs) is a phenomenon often observed when devices with high-k gate dielectrics are compared to thermally grown SiO2. To understand the origin of this remarkable phenomenon, solution-processed In2O3 thin films are deposited onto eight sets of dielectrics (SiO2, Al2O3, ZrO2, HfO2, and bilayered SiO2/high-k structures) and bottom-gate TFTs are fabricated. With these structures, the total gate capacitance can be varied independently from the semiconductor-dielectric interface to study this mobility enhancement. By examining mobility vs. carrier concentration, subthreshold slope, and a numerical device model, we find that SiO2 and Al2O3 have fewer defects at the interface than HfO2 and ZrO2. We show that the mobility enhancement is a combination of the effects of areal gate capacitance and interface quality for disordered oxide semiconductor devices.