The hunt for post-CMOS devices has seen emergence of many new devices and materials, one among those is graphene based Tunnel Field Effect Transistor (TFET). It becomes necessary to investigate device-circuit and device-system co-design to tackle some of the challenges posed by these devices. Defect analysis and related data is necessary to study variation and effects that realistic devices would have on system level. Such defect analyses require quantum mechanical analyses and are compute and time intensive. In order to quickly gain insight and hence speed up defect analysis for graphene based TFET devices, we have developed a bandstructure based filtering mechanism which filters out severely defected devices from a pool of devices under study thus saving computation time. Effort has also been made to develop a compact model based on Landauer equation for ballistic transport and expression for quantum mechanical tunneling.
University of Minnesota M.S. thesis. May 2014. Major: Electrical Engineering. Advisor: Kiarash Bazargan. 1 computer file (PDF); iv, 43 pages, appendix p. 41-43.
Jaiswal, Akhilesh Ramlaut.
Speeding-up defect analysis and modeling of graphene based tunnel field effect transistors.
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